This standard defines a technical architecture for quantum computers. Features and characteristics of the architecture are based on quantum qubit modalities (e.g., superconducting, neutral atoms, trapped ions, photonic, NV centers), and mode of operations (e.g., digital and analog). The defined architectures include the hardware (e.g., signal generator), low-level software (e.g., quantum error correction) components, and programming method (description of quantum circuits, description of Hamiltonian evolution) of such architectures.
- Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More About C/MSC - Microprocessor Standards Committee - Status
- Active PAR
- PAR Approval
- 2023-09-21
Working Group Details
- Society
- IEEE Computer Society
Learn More About IEEE Computer Society - Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More About C/MSC - Microprocessor Standards Committee - Working Group
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QuARC/WG - Quantum Computing Architecture Working Group
Learn More About QuARC/WG - Quantum Computing Architecture Working Group - IEEE Program Manager
- Tom Thompson
Contact Tom Thompson - Working Group Chair
- Blaise Vignon
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