Active PAR

P1076

Standard for VHDL Language Reference Manual

This standard defines the syntax and semantics of the Verification and Hardware Description Language (VHDL). Previous versions of this standard abbreviate VHDL as VHSIC Hardware Description Language with VHSIC standing for Very High Speed Integrated Circuits. In this standard, replacing the meaning of 'V' in VHDL to Verification reflects the language's increasing usage for verification as well as design.

Standard Committee
C/DA - Design Automation
Status
Active PAR
PAR Approval
2021-12-08
Superseding
1076-2019

Working Group Details

Society
IEEE Computer Society
Standard Committee
C/DA - Design Automation
Working Group
P1076 - VHDL Analysis and Standardization Group
Learn More About P1076 - VHDL Analysis and Standardization Group
IEEE Program Manager
Vanessa Lalitte
Contact Vanessa Lalitte
Working Group Chair
Jim Lewis

Other Activities From This Working Group

Current projects that have been authorized by the IEEE SA Standards Board to develop a standard.


No Active Projects

Standards approved by the IEEE SA Standards Board that are within the 10-year lifecycle.


1076-2019
IEEE Standard for VHDL Language Reference Manual

VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.

Learn More About 1076-2019

These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.


1076-2008
IEEE Standard VHDL Language Reference Manual

VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)

Learn More About 1076-2008

1076c-2007
IEEE Standard VHDL Language Reference Manual - Procedural Language Application Interface

This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002

Learn More About 1076c-2007

These standards have been removed from active status through a ballot where the standard is made inactive as a consensus decision of a balloting group.


No Inactive-Withdrawn Standards

These standards are removed from active status through an administrative process for standards that have not undergone a revision process within 10 years.


No Inactive-Reserved Standards
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