VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Since it is both machine and human readable, it supports the design, development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. This document is intended for the implementers of tools supporting the language and the advanced users of the language.This standard defines the syntax and semantics of the VHSIC Hardware Description Language (VHDL). The acronym, VHSIC (Very High Speed Integrated Circuits), in the language's name comes from the U.S. government program that funded early work on the standard.
Working Group: P1076 - VHDL Analysis and Standardization Group
Sponsor: C/DA - Design Automation
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