Standard Details
VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)
| Sponsor Committee | |
| Status |
Superseded
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| Superseded by | |
| Board Approval |
2004-09-23
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| History |
Published Date:2009-01-26
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Additional Resources Details
| PAR | |
| Downloads |
Working Group Details
| Working Group |
P1076 - VHDL Analysis and Standardization Group
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| Working Group Chair |
Jim Lewis
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| Sponsor Committee | |
| Society | |
| IEEE Program Manager | |
| Existing Standards |
This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002
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VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (This standard incorporates open source. See https://opensource.ieee.org/vasg/Packages)
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