A mechanical and electrical specification for implementing a common interoperable mechanical quick-disconnect interconnect system for use by industry for interfacing large numbers of electrical signals (digital, analog, RF, power, etc.) is provided. These large interface panels (receiver and fixture panels) are employed primarily in test systems between stimulus/measurement assets and a related unit-under-test (UUT), although any application involving high-density contacts requiring a quick disconnect interface could benefit. The receiver is a receptacle that is mounted to test system mates with multiple fixtures, which serve as the buffer between the UUT and automatic test equipment (ATE). Fixtures translate standard input/output (I/O) signal routing offered at the receiver to a wiring interface that directly connects to the UUT. These UUT interfaces can represent cable connectors, direct plug-in (printed circuit board edge connectors), sensor monitoring, or manual feedback from the test technician. The primary objectives of this standard are: (a) to establish interface standards that permit interchangeability of mechanical/electrical receiver/fixture/connector product assemblies from various manufacturers under an open architecture; and (b) to develop within this framework a defined set(s) of interconnecting connector and mechanical specifications that supports available, accepted, low-cost commercial technology to reduced dependence on proprietary designs and extend life-cycle availability.
- Standard Committee
- BOG/SCC20 - SCC20 - Test and Diagnosis for Electronic Systems
- Status
- Active Standard
- Adoption of
- 1505-2010
- History
-
- Published:
- 2015-12-30
Working Group Details
- Society
- Standard Committee
- BOG/SCC20 - SCC20 - Test and Diagnosis for Electronic Systems
- Working Group
-
1505_WG - Hardware Interfaces Working Group/1505_WG
- IEEE Program Manager
- Patrycja Jarosz
Contact Patrycja Jarosz
Other Activities From This Working Group
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63003-2015
IEC/IEEE International standard for the common test interface pin map configuration for high-density, single-tier electronics test requirements utilizing IEEE Std 1505(TM)
This standard represents an extension to the IEEE 1505 receiver fixture interface (RFI) standard specification. Particular emphasis is placed on defining within the IEEE 1505 RFI standard a more specific set of performance requirements that employ a common scalable: (a) pin map configuration; (b) specific connector modules; (c) respective contacts; (d) recommended switching implementation; and (e) legacy automatic test equipment (ATE) transitional devices. This is intentionally done to standardize the footprint and assure mechanical and electrical interoperability between past and future automatic test systems (ATS).
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