A method is provided for specifying power intent for an electronic design, for use in verification of the structure and behavior of the design in the context of a given power management architecture, and for driving implementation of that power management architecture. The method supports incremental refinement of power intent specifications required for IP-based design flows.
- Sponsor Committee
- C/DA - Design Automation
Learn More - Status
- Active Standard
- Adoption of
- 1801-2013
- History
-
- Published:
- 2015-03-24
Working Group Details
- Society
- IEEE Computer Society
Learn More - Sponsor Committee
- C/DA - Design Automation
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