The standard describes how to package and format foundry technology information that interfaces with Electronic Design Automation (EDA) tools to facilitate analog/Radio Frequency (RF), digital, photonics, and quantum chip design. The technology information includes layer definitions, physical structure, technology design rules, technology primitives, component extraction, parameterized cells (pcells), component models, cell libraries, model libraries, and parasitic extraction rules and data. The standard defines a universal Process Design Kit (PDK) format and data packaging methodology, not an open standard, and does not require disclosure of foundry-proprietary content, process parameters, manufacturing specifications, or yield enhancement methodologies.
- Standard Committee
- C/DA - Design Automation
- Joint Sponsors
-
CASS/IC-SC
C/MSC
- Status
- Active PAR
- PAR Approval
- 2025-12-10
Working Group Details
- Society
- IEEE Computer Society
- Standard Committee
- C/DA - Design Automation
- Working Group
-
UFPDK - Universal Foundry Process Design Kit (PDK)
- IEEE Program Manager
- Vanessa Lalitte
Contact Vanessa Lalitte - Working Group Chair
- Curt Karnstedt
Other Activities From This Working Group
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