A high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses, as well as such nonbus interconnects as the IEEE Std 1596-1992, Scalable Coherent Interface, is specified. It is intended to provide a low-cost interconnect between cards on the same backplane, cards on other backplanes, and external peripherals. This standard follows the IEEE Std 1212-1991 Command and Status Register (CSR) architecture.
- Standard Committee
- C/MSC - Microprocessor Standards Committee
- Status
- Superseded Standard
- Superseded by
- 1394-2008
- Amendments
-
1394a-2000
1394b-2002
1394c-2006
1394c-2006
- Board Approval
- 1995-12-12
- History
-
- ANSI Approved:
- 1996-07-22
- Published:
- 1996-08-30
Working Group Details
- Society
- IEEE Computer Society
- Standard Committee
- C/MSC - Microprocessor Standards Committee
- Working Group
-
1394_WG - High Performance Serial Bus Working Group
- IEEE Program Manager
- Malia Zaman
Contact Malia Zaman - Working Group Chair
- Ashley Butterworth
Other Activities From This Working Group
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No Active Standards
These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.
1394b-2002
Standard for High Performance Serial Bus (High Speed Supplement)]
Supplemental information for a high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. It is intended to extend the usefulness of a low-cost interconnect between external peripherals. This standard follows the IEEE Std 1212 -2001 Command and Status Register (CSR) architecture.
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