VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)
- Standard Committee
- C/DA - Design Automation
- Status
- Superseded Standard
- PAR Approval
- 2004-09-23
- Superseded by
- 1076-2019
- Superseding
- 1076-2002
- Board Approval
- 2008-09-26
- History
-
- ANSI Approved:
- 2009-02-10
- Published:
- 2009-01-26
Additional Resources
- Downloads
- 1076-2008_downloads.zip
Working Group Details
- Society
- IEEE Computer Society
- Standard Committee
- C/DA - Design Automation
- Working Group
-
P1076 - VHDL Analysis and Standardization Group
- IEEE Program Manager
- Vanessa Lalitte
Contact Vanessa Lalitte - Working Group Chair
- Jim Lewis
Other Activities From This Working Group
Current projects that have been authorized by the IEEE SA Standards Board to develop a standard.
P1076
Standard for VHDL Language Reference Manual
This standard defines the syntax and semantics of the Verification and Hardware Description Language (VHDL). Previous versions of this standard abbreviate VHDL as VHSIC Hardware Description Language with VHSIC standing for Very High Speed Integrated Circuits. In this standard, replacing the meaning of 'V' in VHDL to Verification reflects the language's increasing usage for verification as well as design.
Standards approved by the IEEE SA Standards Board that are within the 10-year lifecycle.
1076-2019
IEEE Standard for VHDL Language Reference Manual
VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.
61691-1-1-2023
IEEE/IEC International Standard--Behavioural languages--Part 1-1: VHDL Language Reference Manual
VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.
These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.
1076c-2007
IEEE Standard VHDL Language Reference Manual - Procedural Language Application Interface
This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002
These standards have been removed from active status through a ballot where the standard is made inactive as a consensus decision of a balloting group.
No Inactive-Withdrawn Standards
These standards are removed from active status through an administrative process for standards that have not undergone a revision process within 10 years.
No Inactive-Reserved Standards