Tag: Computer Technology

IEEE Standard for Information Technology–Test Methods for Measuring Conformance to POSIX(TM)–Part1: System Interfaces

IEEE Std 2003.1-1992 provides a definition of the requirements placed upon providers of POSIX test methods for POSIX.1 (IEEE Std 10031-1990; ISO/IEC 9945-1: 1990). These requirements consist of a POSIX.1-ordered…

IEEE Standard for Information Technology – Test Methods Specifications for Measuring Conformance to POSIX(TM) – Part 1: System Application Program Interface (API) – Amendment 1: Realtime Extension [C Language]

This standard defines the test method specifications for IEEE Std 1003.1b-1993 (based on the document corresponding to the merger of IEEE Std 1003.1-1990 and IEEE Std 1003.1b-1993). The test method…

IEEE Standard for Information Technology -Test Methods for Measuring Conformance to POSIX(TM) – Part II: Shell and Utilities

A definition of the requirements placed upon providers of a POSIX Conformance Test Suite for the POSIX.2 standard (ISO/IEC 9945-2:1993, IEEE/ANSI Std. 1003.2-1992) is provided. These requirements consist of a…

IEEE Standard for Scalable Coherent Interface (SCI)

The scalable coherent interface (SCI) provides computer-bus-like services but, instead of a bus, uses a collection of fast point-to-point unidirectional links to provide the far higher throughput needed for high-performance…

IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI)

Scalable Coherent Interface (SCI), specified in IEEE Std 1596-1992, provides computer-bus-like services but uses a collection of fast point-to-point links instead of a physical bus in order to reach far…

IEEE Standard for High-Bandwidth Memory Interface Based on Scalable Coherent Interface (SCI) Signaling Technology (RamLink)

A high-bandwidth interface optimized for interchanging data between a memory controller and one or more dynamic RAMs is specified. RamLink is an applicable interface for other RAM-like devices as well.

IEEE Standard for Shared-Data Formats Optimized for Scalable Coherent Interface (SCI) Processors

Formats for interchanging integer, bit-field, and floating point data between heterogeneous multiprocessors in a Scalable Coherent Interface (SCI) system are specified. The defined data formats can also be used to…

IEEE Standard for a 32-bit Microprocessor Architecture

A 32-bit microprocessor architecture, available to a wide variety of manufacturers and users, is defined. The standard includes the definition of the instruction set, register model, data types, instruction op-codes,…

IEEE Standard for Modeling and Simulation (M&S) High Level Architecture (HLA) – Framework and Rules

The High Level Architecture (HLA) Framework and Rules is the capstone document fora family of related HLA standards. It defines the HLA, its components, and the rules that outline the…
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