Active PAR

P1959

Standard for Metrics for Energy Efficiency in Machine Learning Hardware Architectures and Systems

This standard provides the descriptions and definitions of metrics to quantify energy efficiency of hardware architectures and systems used to implement machine learning (ML) models and algorithms for training and inference. It includes metrics for machine learning systems, from edge devices to data center servers, and their hardware components such as Central Processing Units (CPUs), Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), specialized processors, accelerators, memory, storage, communications interconnects, and network elements. The guide includes ML hardware architectures and systems used in different application areas, such as image processing (or computer vision), Natural Language Processing (NLP), recommendation systems and scientific discovery. Machine learning models commonly used to implement above application types are considered, such as Large Language Models (LLMs) for NLP and Large Vision Models (LVMs) for computer vision. Creation of benchmarks is not in scope.

Standard Committee
COM/GreenICT-SC - Green ICT Standards Committee
Status
Active PAR
PAR Approval
2024-11-12

Working Group Details

Society
IEEE Communications Society
Standard Committee
COM/GreenICT-SC - Green ICT Standards Committee
Working Group
EECH - Energy Efficient Comm Hardware
IEEE Program Manager
Dalisa Gonzalez
Contact Dalisa Gonzalez
Working Group Chair
Sara Biyabani

Other Activities From This Working Group

Current projects that have been authorized by the IEEE SA Standards Board to develop a standard.


P1960
Guide for Energy Efficiency in Machine Learning Hardware Architectures and Systems

This guide provides best practices for energy efficient implementations, architectures, and the organizations of hardware and systems used for Machine Learning (ML) models and algorithms. It covers hardware architectures and systems used for ML training as well as inference. Its scope includes a range of machine learning systems–from edge devices to data center servers–and their hardware components such as Central Processing Units (CPUs), Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), specialized processors, accelerators, memory, storage, communications interconnects, and network elements. The guide includes ML hardware architectures and systems used in different application areas, such as image processing (or computer vision), Natural Language Processing (NLP), recommendation systems and scientific discovery. Machine learning models commonly used to implement above application types are considered, such as Large Language Models (LLMs) for NLP and Large Vision Models (LVMs) for computer vision.

Learn More About P1960

Standards approved by the IEEE SA Standards Board that are within the 10-year lifecycle.


1923.1-2021
IEEE Standard for Computation of Energy Efficiency Upper Bound for Apparatus Processing Communication Signal Waveforms

A method for computation of an energy efficiency upper bound for an apparatus (wireless or wired) processing a particular communication signal waveform is specified in this standard. This method utilizes the signal envelope probability density function in combination with apparatus' power dissipation characteristics to calculate the energy efficiency upper bound. The purpose of this standard is to provide a consistent tool to other Working Groups and other practitioners who need to evaluate any communication signal waveforms potential for energy efficiency when implemented in hardware.

Learn More About 1923.1-2021

1924.1-2022
IEEE Recommended Practice for Developing Energy-Efficient Power-Proportional Digital Architectures

A set of guidelines is presented in this recommended practice for the development of energy-efficient and power-proportional digital architectures so that energy is only consumed when computations are under way and energy is reduced in the non-operating state. The purpose of this practice is to provide guidelines for the designers and developers of digital architectures for creating power-proportionality at different levels of the system.

Learn More About 1924.1-2022

These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.


No Superseded Standards

These standards have been removed from active status through a ballot where the standard is made inactive as a consensus decision of a balloting group.


No Inactive-Withdrawn Standards

These standards are removed from active status through an administrative process for standards that have not undergone a revision process within 10 years.


No Inactive-Reserved Standards
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