IEEE 1364-2001 - IEEE Standard Verilog Hardware Description Language
Standard Details
Supersedes 1364-1995. The Verilog(R) Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable,it supports the development,verification, synthesis,and testing of hardware designs; the communication of hardware design data; and the maintenance,modification,and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.
Sponsor Committee
Status
Superseded by
Board Approval
History
Additional Resources Details
Erratum
PAR
Historical Base Standard
Working Group Details
Working Group
Working Group Chair
Sponsor Committee
Society
IEEE Program Manager
Existing Standards