IEEE 1164-1993 - IEEE Standard Multivalue Logic System for VHDL Model Interoperability (Std_logic

Standard

Superseded

IEEE 1164-1993 - IEEE Standard Multivalue Logic System for VHDL Model Interoperability (Std_logic_1164)

Standard Details

This standard is embodied in the Std_logic_1164 package declaration and the semantics of the Std_logic_1164 body. An annex is provided to suggest ways in which one might use this package.

Sponsor Committee	C/DA - Design Automation
Status	Superseded
Board Approval	1993-03-18
History	Published Date:1993-05-26

Additional Resources Details

Erratum	1164-1993_errata.pdf
PAR	Approved PAR

Working Group Details

Working Group	VSAG_WG - VHDL Language Working Group
Working Group Chair	Jim Lewis
Sponsor Committee	C/DA - Design Automation
Society	C - IEEE Computer Society
IEEE Program Manager	Jonathan Goldberg
Existing Standards	Superseded 1076-2002 - IEEE Standard VHDL Language Reference Manual Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.