Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused (legacy, commercial off-the-shelf [COTS], non-developmental items). The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of products.
- Sponsor Committee
- C/S2ESC - Software & Systems Engineering Standards Committee
Learn More About C/S2ESC - Software & Systems Engineering Standards Committee - Status
- Active Standard
- PAR Approval
- 2013-02-01
- Superseding
- 1012-2012
- Corrigendum
-
1012-2016/Cor 1-2017
- Board Approval
- 2016-05-15
- History
-
- ANSI Approved:
- 2017-12-04
- Published:
- 2017-09-29
Working Group Details
- Society
- IEEE Computer Society
Learn More About IEEE Computer Society - Sponsor Committee
- C/S2ESC - Software & Systems Engineering Standards Committee
Learn More About C/S2ESC - Software & Systems Engineering Standards Committee - Working Group
-
1012_WG - Std for Software Verification and Validation Working Group
- IEEE Program Manager
- Patricia Roder
Contact Patricia Roder - Working Group Chair
- Edward Addy
Other Activities From This Working Group
Current projects that have been authorized by the IEEE SA Standards Board to develop a standard.
P1012
IEEE Draft Standard for System, Software, and Hardware Verification and Validation
Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused [legacy, commercial off-the-shelf (COTS), non-developmental items]. The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes related information or documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of product
Standards approved by the IEEE SA Standards Board that are within the 10-year lifecycle.
1012-2016/Cor 1-2017
IEEE Draft Standard for System, Software and Hardware Verification and Validation - Corrigendum 1
Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused [legacy, commercial off-the-shelf (COTS), non-developmental items]. The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of products. (NOTE: IEEE Std 1012-2016/Cor1-2017 was not published as an separate standard, but was incorporated into Std 1012-2016 at publication)
These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.
1012-1986
IEEE Standard for Software Verification and Validation Plans
Uniform and minimum requirements for the format and content of software verification and validation (V&V) tasks and their required inputs and outputs that are to be included in SVVPs are provided for both critical and noncritical software. For critical software, specific minimum verification and validation (V&V) tasks and their required inputs and outputs that are to be included in SVVPs are defined. Optional V&V tasks to be used to tailor SVVPs as appropriate for the particular V&V effort are suggested. An overview of V&V is given, and life-cycle V&V, software V&V reporting, and V&V administrative procedures are covered.
1012-1998
IEEE Standard for Software Verification and Validation
Software verification and validation (V&V) processes, which determine whether development products of a given activity conform to the requirements of that activity, and whether the software satisfies its intended use and user needs, are described. This determination may include analysis, evaluation, review, inspection, assessment, and testing of software products and processes. V&V processes assess the software in the context of the system, including the operational environment, hardware, interfacing software, operators, and users.
1012-2004
IEEE Standard for Software Verification and Validation
Software verification and validation (V&V) processes determine whether the development products of a given activity conform to the requirements of that activity and whether the software satisfies its intended use and user needs. Software V&V life cycle process requirements are specified for different software integrity levels. The scope of V&V processes encompasses software-based systems, computer software, hardware, and interfaces. This standard applies to software being developed, maintained, or reused [legacy, commercial off-the-shelf(COTS), non-developmental items]. The term software also includes firmware, microcode,and documentation. Software V&V processes include analysis, evaluation, review, inspection,assessment, and testing of software products.
1012-2012
IEEE Standard for System and Software Verification and Validation
Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused [legacy, commercial off-the-shelf (COTS), non developmental items]. The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of products.
These standards have been removed from active status through a ballot where the standard is made inactive as a consensus decision of a balloting group.
No Inactive-Withdrawn Standards
These standards are removed from active status through an administrative process for standards that have not undergone a revision process within 10 years.
No Inactive-Reserved Standards