The VITAL (VHDL Initiative Towards ASIC Libraries)ASIC Modeling Specification is defined in this standard.This modeling specification defines a methodology which promotes the development of highly accurate, efficient simulation models for ASIC (Application-Specific Integrated Circuit)components in VHDL.
- Standard Committee
- C/DA - Design Automation
- Status
- Inactive-Withdrawn Standard
- PAR Approval
- 1999-06-26
- Superseding
- 1076.4-1995
- Board Approval
- 2000-09-21
- History
-
- Withdrawn:
- 2009-01-26
- ANSI Approved:
- 2001-02-01
- Published:
- 2001-09-28
Working Group Details
- Society
- IEEE Computer Society
- Standard Committee
- C/DA - Design Automation
- Working Group
-
VITAL_WG - VITAL Application Specific Integrated Circuit Working Group
- IEEE Program Manager
- Vanessa Lalitte
Contact Vanessa Lalitte - Working Group Chair
- Ajayharsh Varikat
Other Activities From This Working Group
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