Futurebus+ standards provide systems developers a set of tools with which high-performance bus-based systems may be developed. This architecture provides a wide range of performance scalability over both cost and time for multiple generations of single- and multiple-bus multiprocessor systems. This document, a companion standard to IEEE Std. 896.1-1991, builds on the logical layer by adding requirements for physical layer instantiation. Material in this document includes specifications for node management, live insertion, and profiles. It is to these profiles that products will claim conformance. Other specifications that may be required in conjunction with this standard are the following: IEEE Std 896.1-1991; P896.3, Futurebus+ Recommended Practices; P1212.x, Control and Status Register Architectures; IEEE Std 1194.1-1991, Electrical Characteristics of Backplane Transceiver Logic (BTL) Interface Circuits; and IEEE Std 1301.x, Metric Equipment Practices for Microcomputers.
- Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More About C/MSC - Microprocessor Standards Committee - Status
- Inactive-Withdrawn Standard
- Amendment
-
896.2a-1994
- Board Approval
- 1991-09-26
- History
-
- Withdrawn:
- 1997-12-09
- ANSI Approved:
- 1992-06-04
- Published:
- 1992-04-24
Working Group Details
- Society
- IEEE Computer Society
Learn More About IEEE Computer Society - Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More About C/MSC - Microprocessor Standards Committee
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