IEC 61691-5: 2004 Dual-logo document. Will replace IEEE Std 1076.4-2000. The VITAL (VHDL Initiative Towards ASIC Libraries) ASIC Modeling Speci cation is de ned in this standard.This modeling speci cation de nes a methodology which promotes the development of highly accurate, ef cient simulation models for ASIC (Application-Speci c Integrated Circuit)components in VHDL.