The standard specifies a method to verify the Magnetic Immunity (MI) of Magnetoresistive Random Access Memory (MRAM), in both discrete and embedded random access memory integrated circuit environments. In particular, measurement conditions are defined to evaluate the maximum static magnetic field allowed, in order to meet a prescribed bit error rate (BER), or number of errors per MRAM operation. MRAM operations include "read," "write," "power-off," and "stand-by." As a vectorial quantity, recommended maximum static field may be described as a function of angular orientation with respect to an integrated circuit substrate, or in terms of a worst-case angle, is determined by theory based on the magnetostatic free energy of an MRAM device. Measurements may be made on packaged MRAM integrated chips and MRAM on unpackaged substrate wafers alike. The verification results may be used to define the maximum static field allowed in order to meet the bit error rate is defined in an MRAM suppliers specifications sheet (data sheet).
- Sponsor Committee
- MS/MagSoc-SC - Magnetics Society Standards Committee
- Status
- Active PAR
- PAR Approval
- 2024-06-06
Working Group Details
- Society
- IEEE Magnetics Society
Learn More About IEEE Magnetics Society - Sponsor Committee
- MS/MagSoc-SC - Magnetics Society Standards Committee
- Working Group
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P3465 Magnetic Immunity - P3465 Developing Magnetic Immunity Standards for Magnetic Random Access Memory
- IEEE Program Manager
- Malia Zaman
Contact Malia Zaman - Working Group Chair
- Daniel Gopman
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