LV3.6.2 - 3.6.2 LV Solid State Surge Protective Components WG

Michael J Maytum

This standard sets terms, test methods, test circuits, measurement procedures and preferred result values for diodes with one or more silicon PN-junctions used for surge voltage clamping in low-voltage systems. The technology types covered are: * forward biased diodes * Zener breakdown diodes * avalanche breakdown diodes * punch-through diodes * fold-back diodes This standard does not cover thyristor surge protective components, see (b-IEEE Std C62.37)

This standard applies to two terminal or multiple terminal silicon avalanche breakdown diodes (ABD), which are one type of surge protective device component (SPDC). In this document, these devices will be called ABDs. ABDs limit (clamp) transient voltages and divert transient currents. This standard contains terms, symbols and definitions, and provides test methods for verifying ratings and measuring device characteristics. Service conditions and failure mode are also provided. This standard may also apply to other silicon surge protective device components with similar V-I characteristics.

Varistors for surge-protective applications on systems with dc to 420 Hz frequency and voltages equal to or less than 1000 V rms, or 1200 V dc, are covered. Definitions, service conditions, and a series of test criteria for determining the electrical characteristics of the varistors are provided. The tests are intended as design tests and provide a means of comparing various surge-protective devices.

A two-terminal avalanche junction surge suppressor for surge-protective application on systems with dc to 420-Hz frequency and voltages equal to or less than 1000 V rms or 1200 V dc is considered. The device is a single package that may be assembled from any combination of series and/or parallel diode chips. Definitions, service conditions, and a series of test criteria for determining its electrical characteristics are provided. These devices are used as surge diverters for limiting transient overvoltages in power and communications circuits.

This standard applies to two or three terminal, four or five layer, thyristor surge protection devices (SPDs) for application on systems with voltages equal to or less than 1000 V rms or 1200 V dc.

Applications information on fixed-voltage and gated-thyristor surge protective components (SPCs) is provided. Key device parameters and their sensitivities are explained. Several worked telecommunication circuit design examples are given.

Test methods and preferred values for metal-oxide varistor (MOV) surge protective components are covered in this standard and have the following main parameter ranges: packaging (leaded disc-type or surface mount), nominal varistor voltage (5 V to 1200 V), 8/20 surge current rating (10 A to 70 kA), and 8/20 clamping voltage (10 V to 3 kV). With appropriate component selection, these components could be used for the overvoltage protection of power and signal systems having continuous ac voltages (2.5 V rms to 750 V rms), steady-state dc voltages (3.3 V to 1000 V), and peak signal feed voltages (3.5 V to 850 V). Information is given on manufacturer type testing used to determine environmental performance and rated values.

The basic requirements to be met by series connected, solid-state, self-restoring overcurrent protectors (OCPs) for the protection of telecommunication equipment and lines are presented. This standard should be used for the harmonization of existing or future specifications issued by solid-state, self-restoring OCP manufacturers, telecommunication equipment manufacturers, administrations, or network operators.

Terms, test methods, test circuits, measurement procedures, and preferred result values for the surge mitigation parameters of isolating transformers used in networking devices and equipment are set in this standard. Three types of isolating transformer are considered: mains low frequency power, high frequency power (switching mode power supplies) and signal (e.g., Ethernet data).

Added in this amendment is a new sub-clause, 4.5 Saturated core secondary winding parameters, to IEEE C62.69(TM)-2016. Test methods, test circuits, measurement procedures, and result treatment to determine the secondary winding resistance and saturated core inductance are given.