Administratively withdrawn January 2007. A common bus architecture (which includes functional components--modules, nodes,and units--and their address space, transaction set, CSRs, and configuration information) suitable for both parallel and serial buses is provided in this standard. Bus bridges are enabled by the architecture, but their details are beyond its scope. Configuration information is self- administered by vendors and organizations based upon IEEE Registration Authority company_id.
- Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More About C/MSC - Microprocessor Standards Committee - Status
- Inactive-Withdrawn Standard
- PAR Approval
- 1996-12-10
- Superseding
- 1212-1991
- Board Approval
- 2001-12-06
- History
-
- Withdrawn:
- 2007-01-18
- ANSI Approved:
- 2002-05-02
- Published:
- 2002-09-06
Working Group Details
- Society
- IEEE Computer Society
Learn More About IEEE Computer Society - Sponsor Committee
- C/MSC - Microprocessor Standards Committee
Learn More About C/MSC - Microprocessor Standards Committee - Working Group
-
1212_WG - Control and Status Registers Working Group
- IEEE Program Manager
- Tom Thompson
Contact Tom Thompson - Working Group Chair
- Brian Batchelder
Other Activities From This Working Group
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These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.
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These standards have been removed from active status through a ballot where the standard is made inactive as a consensus decision of a balloting group.
No Inactive-Withdrawn Standards
These standards are removed from active status through an administrative process for standards that have not undergone a revision process within 10 years.
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