Working Group Details
1149.4WG - Mixed-Signal Test Bus Working Group
|Working Group Chair||
|IEEE Program Manager|
This standard defines a mixed-signal test bus architecture that provides the means of control and access to both analog and digital test signals such that the testability structure for digital circuits described in IEEE Std 1149.1-2013 has been extended effectively to provide similar facilities for mixed-signal circuits. In addition to testing of interconnections in the conventional sense of IEEE Std 1149.1-2013, the mixed-signal test bus defined by this standard also provides the means for parametric testing and, optionally, the means to access internal test structures. The standard does not mandate implementation details of the test circuitry, although examples of conformant implementations are given for illustration. Further, the standard develops extensions to Boundary-Scan Description Language (BSDL) as a means of describing key aspects of the implementation of this standard within a particular component. At present, the extensions to BSDL defined by this standard specifically omit the description of any and all analog parameters defined by the standard.
The testability structure for digital circuits described in IEEE Std 1149.1-2001 has been extended to provide similar facilities for mixed-signal circuits. The architecture is described, together with the means of control of and access to, both analog and digital test data. Sample implementation and application details (which are not part of the standard) are included for illustration. Also, extensions to the standard BSDL are defined that allow description of key component-specific aspects of such testability features.