Working Group Details
StdPkg_WG - Standards Packages Working Group
|Working Group Chair||
Homer Alan Mantooth
|IEEE Program Manager|
The current interpretation of common logic values and the association of numeric values to specific VHDL array types is described. This standard provides semantic for the VHDL synthesis domain, and enables formal verification and simulation acceleration in the VHDL based design. The standard interpretations are provided for values of standard logic types defined by IEEE Std 1164-1993, and of the BIT and BOOLEAN types defined in IEEE Std 1076-1993. The numeric types SIGNED and UNSIGNED and their associated operators define integer and natural number arithmetic for arrays of common logic values. Twos complement and binary encoding techniques are used. The numeric semantic is conveyed by two VHDL packages. This standard also contains any allowable modifications.
1076.1.1-2004 - IEEE Standard VHDL Analog and Mixed-Signal Extensions---Packages for Multiple Energy Domain Support
This standard defines a collection of VHDL 1076.1 packages, compatible with IEEE Std 1076.1TM-1999, along with recommendations for conforming use, in order to facilitate the interchange of simulation models of physical components and subsystems. The packages include the definition of standard types, subtypes, natures, and constants for modeling in multiple energy domains (electrical, fluidic, mechanical, etc.).