P1149.7 - Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture
Project Details
The standard will define a link between IEEE Std 1149.1, IEEE Standard Test Access Port and Boundary Scan Architecture interfaces in Debug and Test Systems (DTS) and IEEE 1149.1 (JTAG) interfaces in Target Systems (TS). The link defined by this standard introduces an additional layer between these legacy interfaces. This layer may be viewed as an adapter that provides new functionality and features while preserving all elements of the original IEEE 1149.1 (JTAG) interfaces. The standard will define the link behavior (including timing characteristics of signals), protocols, and functionality of the adapters deployed within the DTS and TS. The standard will not modify or create inconsistencies with IEEE 1149.1 (JTAG). The standard will define a superset of the IEEE 1149.1 specification and achieve compliance with the IEEE 1149.1 standard.
Standards Committee
PAR Approval
Additional Resources Details
Historical Base Standard
Working Group Details
Working Group
Standards Committee
IEEE Program Manager
Existing Standards