This document specifies a scalable interface between mass-storage devices and controlling hard-ware/software. The interface has been optimized for low-latency interconnects, assuming that the proces-sor/controller and the storage device can often be co-located on the same printed-circuit board. The interface can also be used with longer-distance bus-like interconnects, including (but not limited to) IEEE Std 1394-1995 Serial Bus and IEEE Std 1596-1992 Scalable Coherent Interface.
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