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Case Study: IEEE 1800™-2005 System Verilog
Type of Standard:
Corporate
Challenge:
The semiconductor industry faced an increasing need for design automation tools and methodologies that would address the complexities of verification. Traditional verification methods resulted in a lack of products designed to ensure interoperability. This impeded product proliferation and growth in the global marketplace.
Solution / Services:
IEEE Professional Services offered a customized array of support and facilitation services across a complicated project lifecycle, from schedule management to the provision of editorial support.
Outcomes:
IEEE 1800-2005 - IEEE Standard for System Verilog: Unified Hardware Design, Specification and Verification Language, Is a dual-logo IEEE/IEC Internationally adopted standard, that was developed in a record 17 months. This standard enables interoperability of tools, improves productivity and reduces costs by overcoming the limitations of international verification processes. System Verilog support increased from six companies with nine products to 137 companies with more than 350 products in just 24 months.
As a corporate member of the IEEE SA, Synopsys along with our customers has experienced tangible value from the IEEE SA's corporate program and its funded services model. One of the newest design automation standards, IEEE 1800 SystemVerilog, was ratified quickly through the new model and is now experiencing rapid adoption. We look forward to leveraging the next design automation standards that are going through the new model now, and our customers will be the ultimate beneficiaries.
Karen Bartleson
Director, Interoperability & University Programs, Synopsys, Inc.