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IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual -Description

Abstract: This standard defines the VHSIC Hardware Description Language (VHDL). VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.

Keywords: computer, computer languages, electronic systems, hardware, hardware design, VHDL

Content +

  • 1. Overview of this standard
    • 1.1 Intent and scope of this document
    • 1.2 Structure and terminology of this document
      • 1.2.1 Syntactic description
      • 1.2.2 Semantic description
      • 1.2.3 Front matter, examples, notes, references, and annexes
  • 2. Design entities and configurations
    • 2.1 Entity declarations
      • 2.1.1 Entity header
      • 2.1.2 Entity declarative part
      • 2.1.3 Entity statement part
    • 2.2 Architecture bodies
      • 2.2.1 Architecture declarative part
      • 2.2.2 Architecture statement part
    • 2.3 Configuration declarations
      • 2.3.1 Block configuration
      • 2.3.2 Component configuration
  • 3. Subprograms and packages
    • 3.1 Subprogram declarations
      • 3.1.1 Formal parameters
    • 3.2 Subprogram bodies
    • 3.3 Subprogram overloading
      • 3.3.1 Operator overloading
      • 3.3.2 Signatures
    • 3.4 Resolution functions
    • 3.5 Package declarations
    • 3.6 Package bodies
    • 3.7 Conformance rules
  • 4. Types
    • 4.1 Scalar types
      • 4.1.1 Enumeration types
      • 4.1.2 Integer types
      • 4.1.3 Physical types
      • 4.1.4 Floating point types
    • 4.2 Composite types
      • 4.2.1 Array types
      • 4.2.2 Record types
    • 4.3 Access types
      • 4.3.1 Incomplete type declarations
      • 4.3.2 Allocation and deallocation of objects
    • 4.4 File types
      • 4.4.1 File operations
  • 5. Declarations
    • 5.1 Type declarations
    • 5.2 Subtype declarations
    • 5.3 Objects
      • 5.3.1 Object declarations
      • 5.3.2 Interface declarations
      • 5.3.3 Alias declarations
    • 5.4 Attribute declarations
    • 5.5 Component declarations
    • 5.6 Group template declarations
    • 5.7 Group declarations
  • 6. Specifications
    • 6.1 Attribute specification
    • 6.2 Configuration specification
      • 6.2.1 Binding indication
      • 6.2.2 Default binding indication
    • 6.3 Disconnection specification
  • 7. Names
    • 7.1 Names
    • 7.2 Simple names
    • 7.3 Selected names
    • 7.4 Indexed names
    • 7.5 Slice names
    • 7.6 Attribute names
  • 8. Expressions
    • 8.1 Expressions
    • 8.2 Operators
      • 8.2.1 Logical operators
      • 8.2.2 Relational operators
      • 8.2.3 Shift operators
      • 8.2.4 Adding operators
      • 8.2.5 Sign operators
      • 8.2.6 Multiplying operators
      • 8.2.7 Miscellaneous operators
    • 8.3 Operands
      • 8.3.1 Literals
      • 8.3.2 Aggregates
      • 8.3.3 Function calls
      • 8.3.4 Qualified expressions
      • 8.3.5 Type conversions
      • 8.3.6 Allocators
    • 8.4 Static expressions
      • 8.4.1 Locally static primaries
      • 8.4.2 Globally static primaries
    • 8.5 Universal expressions
  • 9. Sequential statements
    • 9.1 Wait statement
    • 9.2 Assertion statement
    • 9.3 Report statement
    • 9.4 Signal assignment statement
      • 9.4.1 Updating a projected output waveform
    • 9.5 Variable assignment statement
      • 9.5.1 Array variable assignments
    • 9.6 Procedure call statement
    • 9.7 If statement
    • 9.8 Case statement
    • 9.9 Loop statement
    • 9.10 Next statement
    • 9.11 Exit statement
    • 9.12 Return statement
    • 9.13 Null statement
  • 10. Concurrent statements
    • 10.1 Block statement
    • 10.2 Process statement
    • 10.3 Concurrent procedure call statements
    • 10.4 Concurrent assertion statements
    • 10.5 Concurrent signal assignment statements
      • 10.5.1 Conditional signal assignments
      • 10.5.2 Selected signal assignments
    • 10.6 Component instantiation statements
      • 10.6.1 Instantiation of a component
      • 10.6.2 Instantiation of a design entity
    • 10.7 Generate statements
  • 11. Scope and visibility
    • 11.1 Declarative region
    • 11.2 Scope of declarations
    • 11.3 Visibility
    • 11.4 Use clauses
    • 11.5 The context of overload resolution
  • 12. Design units and their analysis
    • 12.1 Design units
    • 12.2 Design libraries
    • 12.3 Context clauses
    • 12.4 Order of analysis
  • 13. Elaboration and execution
    • 13.1 Elaboration of a design hierarchy
    • 13.2 Elaboration of a block header
      • 13.2.1 The generic clause
      • 13.2.2 The generic map aspect
      • 13.2.3 The port clause
      • 13.2.4 The port map aspect
    • 13.3 Elaboration of a declarative part
      • 13.3.1 Elaboration of a declaration
      • 13.3.2 Elaboration of a specification
    • 13.4 Elaboration of a statement part
      • 13.4.1 Block statements
      • 13.4.2 Generate statements
      • 13.4.3 Component instantiation statements
      • 13.4.4 Other concurrent statements
    • 13.5 Dynamic elaboration
    • 13.6 Execution of a model
      • 13.6.1 Drivers
      • 13.6.2 Propagation of signal values
      • 13.6.3 Updating implicit signals
      • 13.6.4 The simulation cycle
  • 14. Lexical elements
    • 14.1 Character set
    • 14.2 Lexical elements, separators, and delimiters
    • 14.3 Identifiers
      • 14.3.1 Basic identifiers
      • 14.3.2 Extended identifiers
    • 14.4 Abstract literals
      • 14.4.1 Decimal literals
      • 14.4.2 Based literals
    • 14.5 Character literals
    • 14.6 String literals
    • 14.7 Bit string literals
    • 14.8 Comments
    • 14.9 Reserved words
    • 14.10 Allowable replacements of characters:
  • 15. Predefined language environment
    • 15.1 Predefined attributes
    • 15.2 Package STANDARD
    • 15.3 Package TEXTIO
  • Annex A Syntax summary
  • Annex B Glossary
    • B.1 abstract literal:
    • B.2 access type:
    • B.3 access mode:
    • B.4 access value:
    • B.5 active driver:
    • B.6 actual:
    • B.7 aggregate:
    • B.8 alias:
    • B.9 allocator:
    • B.10 analysis:
    • B.11 anonymous:
    • B.12 appropriate:
    • B.13 architecture body:
    • B.14 array object:
    • B.15 array type:
    • B.16 ascending range:
    • B.17 ASCII:
    • B.18 assertion violation:
    • B.19 associated driver:
    • B.20 associated in whole:
    • B.21 associated individually:
    • B.22 association element:
    • B.23 association list:
    • B.24 attribute:
    • B.25 base specifier:
    • B.26 base type:
    • B.27 based literal:
    • B.28 basic operation:
    • B.29 basic signal:
    • B.30 belong (to a range):
    • B.31 belong (to a subtype):
    • B.32 binding:
    • B.33 bit string literal:
    • B.34 block:
    • B.35 bound:
    • B.36 box:
    • B.37 bus:
    • B.38 character literal:
    • B.39 character type:
    • B.40 closely related types:
    • B.41 complete:
    • B.42 complete context:
    • B.43 composite type:
    • B.44 concurrent statement:
    • B.45 configuration:
    • B.46 conform:
    • B.47 connected:
    • B.48 constant:
    • B.49 constraint:
    • B.50 conversion function:
    • B.51 convertible:
    • B.52 current value:
    • B.53 decimal literal:
    • B.54 declaration:
    • B.55 declarative part:
    • B.56 declarative region:
    • B.57 decorate:
    • B.58 default expression:
    • B.59 deferred constant:
    • B.60 delta cycle:
    • B.61 denote:
    • B.62 depend
    • B.63 depend
    • B.64 descending range:
    • B.65 design entity:
    • B.66 design file:
    • B.67 design hierarchy:
    • B.68 design library:
    • B.69 design unit:
    • B.70 designate:
    • B.71 designated subtype:
    • B.72 designated type:
    • B.73 designator:
    • B.74 directly visible:
    • B.75 discrete array:
    • B.76 discrete range:
    • B.77 discrete type:
    • B.78 driver:
    • B.79 driving value:
    • B.80 effective value:
    • B.81 elaboration:
    • B.82 element:
    • B.83 entity declaration:
    • B.84 enumeration literal:
    • B.85 enumeration type:
    • B.86 error:
    • B.87 erroneous:
    • B.88 event:
    • B.89 execute:
    • B.90 expanded name:
    • B.91 explicit ancestor:
    • B.92 explicit signal:
    • B.93 explicitly declared constant:
    • B.94 explicitly declared object:
    • B.95 expression:
    • B.96 extend:
    • B.97 extended digit:
    • B.98 external block:
    • B.99 file type:
    • B.100 floating point types:
    • B.101 foreign subprogram:
    • B.102 formal:
    • B.103 full declaration:
    • B.104 fully bound:
    • B.105 generate parameter:
    • B.106 generic:
    • B.107 generic interface list:
    • B.108 globally static expression:
    • B.109 globally static primary:
    • B.110 group:
    • B.111 guard:
    • B.112 guard expression:
    • B.113 guarded assignment:
    • B.114 guarded signal:
    • B.115 guarded target:
    • B.116 hidden:
    • B.117 homograph:
    • B.118 identify:
    • B.119 immediate scope:
    • B.120 immediately within:
    • B.121 implicit signal:
    • B.122 implicitly declared object:
    • B.123 imply:
    • B.124 impure function:
    • B.125 incomplete type declaration:
    • B.126 index constraint:
    • B.127 index range:
    • B.128 index subtype:
    • B.129 inertial delay:
    • B.130 initial value expression:
    • B.131 inputs:
    • B.132 instance:
    • B.133 integer literal:
    • B.134 integer type:
    • B.135 interface list:
    • B.136 internal block:
    • B.137 ISO:
    • B.138 ISO 8859-1:
    • B.139 kernel process:
    • B.140 left of:
    • B.141 left-to-right order:
    • B.142 library:
    • B.143 library unit:
    • B.144 literal:
    • B.145 local generic:
    • B.146 local port:
    • B.147 locally static expression:
    • B.148 locally static name:
    • B.149 locally static primary:
    • B.150 locally static subtype:
    • B.151 longest static prefix:
    • B.152 loop parameter:
    • B.153 lower bound:
    • B.154 match:
    • B.155 matching elements:
    • B.156 member:
    • B.157 mode:
    • B.158 model:
    • B.159 name:
    • B.160 named association:
    • B.161 named entity:
    • B.162 net:
    • B.163 nonobject alias:
    • B.164 nonpostponed process:
    • B.165 null array:
    • B.166 null range:
    • B.167 null slice:
    • B.168 null waveform element:
    • B.169 null transaction:
    • B.170 numeric literal:
    • B.171 numeric type:
    • B.172 object:
    • B.173 object alias:
    • B.174 overloaded:
    • B.175 parameter:
    • B.176 parameter interface list:
    • B.177 parameter type profile:
    • B.178 parameter and result type profile:
    • B.179 parent:
    • B.180 passive process:
    • B.181 physical literal:
    • B.182 physical type:
    • B.183 port:
    • B.184 port interface list:
    • B.185 positional association:
    • B.186 postponed process:
    • B.187 predefined operators:
    • B.188 primary:
    • B.189 projected output waveform:
    • B.190 pulse rejection limit:
    • B.191 pure function:
    • B.192 quiet:
    • B.193 range:
    • B.194 range constraint:
    • B.195 read:
    • B.196 real literal:
    • B.197 record type:
    • B.198 reference:
    • B.199 register:
    • B.200 regular structure:
    • B.201 resolution:
    • B.202 resolution function:
    • B.203 resolution limit:
    • B.204 resolved signal:
    • B.205 resolved value:
    • B.206 resource library:
    • B.207 result subtype:
    • B.208 resume:
    • B.209 right of:
    • B.210 satisfy:
    • B.211 scalar type:
    • B.212 scope:
    • B.213 selected name:
    • B.214 sensitivity set:
    • B.215 sequential statements:
    • B.216 short-circuit operation:
    • B.217 signal:
    • B.218 signal transform:
    • B.219 simple name:
    • B.220 simulation cycle:
    • B.221 single-object declaration:
    • B.222 slice:
    • B.223 source:
    • B.224 specification:
    • B.225 statement transform:
    • B.226 static:
    • B.227 static name:
    • B.228 static range:
    • B.229 static signal name:
    • B.230 static variable name:
    • B.231 string literal:
    • B.232 subaggregate:
    • B.233 subelement:
    • B.234 subprogram specification:
    • B.235 subtype:
    • B.236 suspend:
    • B.237 timeout interval:
    • B.238 to the left of:
    • B.239 to the right of:
    • B.240 transaction:
    • B.241 transport delay:
    • B.242 type:
    • B.243 type conversion:
    • B.244 unaffected:
    • B.245 unassociated formal:
    • B.246 unconstrained subtype:
    • B.247 unit name:
    • B.248 universal_integer:
    • B.249 universal_real:
    • B.250 update:
    • B.251 upper bound:
    • B.252 variable:
    • B.253 visible:
    • B.254 waveform:
    • B.255 whitespace character:
    • B.256 working library:
  • Annex C Potentially nonportable constructs
  • Annex D Changes from IEEE Std 1076-1987
  • Annex E Related standards

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