IEEE Std 961-1987 IEEE Standard for an 8-Bit Microcomputer Bus System: STD Bus -Description

Content

• 1. Scope
• • 1.1 Application
  • 1.2 Inclusions
  • 1.3 Exclusions
  • 1.4 Definitions
• 2. Logical Specifications
• • 2.1 Bus Pin Assignments
  • 2.2 Signal Descriptions
  • • 2.2.1 Power Buses (Pins 1–6 and 53–56)
    • 2.2.2 Data Bus (Pins 7–14) (8-bit, bidirectional, 3-state, active-high)
    • 2.2.3 Address Bus (Pins 15-30) (16-bit, 3-state, active-high)
    • 2.2.4 Control Bus (Pins 31–52)
• 3. Timing Specifications
• • 3.1 Signal Time Sequences
  • • 3.1.1 Address Selection Signal Sequences
    • 3.1.2 Read Signal Sequences
    • 3.1.3 Write Signal Sequences
  • 3.2 Signal Time Durations
  • • 3.2.1 Read Timing
    • 3.2.2 Write Timing
• 4. Electrical Specifications
• • 4.1 CMOS Electrical Specifications
  • • 4.1.1 Maximum Ratings
    • 4.1.2 CMOS Power Bus Voltage Tolerances
    • 4.1.3 CMOS Logic Signal Characteristics
  • 4.2 TTL Electrical Specifications
  • • 4.2.1 Maximum Ratings
    • 4.2.2 TTL Power Bus Voltage Tolerances
    • 4.2.3 TTL Logic Signal Characteristics
  • 4.3 Terminations
• 5. Mechanical Specifications
• • 5.1 Card Dimensions
  • 5.2 Card Profile Dimensions
  • 5.3 Bus Connector
  • 5.4 Card Ejector
  • 5.5 Card Keying
• Annexes Introduction
• 1. 65/68XX Bus Practice
• • 1.1 Introduction
  • 1.2 Peripheral Control Signals
  • 1.3 65/68XX Bus Timing
• 2. 8085 Bus Practice
• • 2.1 Introduction
  • 2.2 Peripheral Control Signals
  • 2.3 8085 Bus Timing
• 3. Z80 Bus Practice
• • 3.1 Introduction
  • 3.2 Peripheral Control Signals
  • 3.3 Priority Chain Application
  • 3.4 Z80 Bus Timing
• 4. 8088 Bus Practice
• • 4.1 Introduction
  • 4.2 Bus Signal Definitions
  • 4.3 Peripheral Control Signals
  • 4.4 8088 Bus Timing

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