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IEEE Std 959-1988 IEEE Standard Specifications for an I/O Expansion Bus: SBX Bus -Description

Content +

  • 1. General
    • 1.1 Scope
    • 1.2 Definitions
      • 1.2.1 General System Term Definitions
      • 1.2.2 Signals and Paths
  • 2. Functional Description
    • 2.1 Bus Elements
      • 2.1.1 Baseboard
      • 2.1.2 Expansion Module
    • 2.2 Bus Signals
      • 2.2.1 Address and Chip Select Lines
      • 2.2.2 Date Lines (MD0-MD15)
      • 2.2.3 Control Lines
      • 2.2.4 Interrupt Lines (MINTR0, MINTR1)
      • 2.2.5 Option Lines (OPT0, OPT1)
      • 2.2.6 Power Lines
      • 2.2.7 Reserved Lines
    • 2.3 Bus Operations
      • 2.3.1 I/O Read Operations
      • 2.3.2 I/O Write Operations
      • 2.3.3 Direct Memory Access (DMA) Operations
      • 2.3.4 Interrupt Operations
  • 3. Electrical Specifications
    • 3.1 General Bus Considerations
      • 3.1.1 Logical and Electrical State Relationships
      • 3.1.2 Signal Line Characteristics
      • 3.1.3 Power Supply Specifications
      • 3.1.4 Environmental Considerations
    • 3.2 Timing Specifications
    • 3.3 Driver and Receiver Specifications
  • 4. Mechanical Specifications
    • 4.1 Connector Pin Assignments
    • 4.2 Expansion Module Specifications
    • 4.3 Baseboard Specifications
    • 4.4 Board Height Specifications
    • 4.5 Mounting Techniques
  • 5. Connector Specifications
    • 5.1 References
    • 5.2 Mechanical Requirements
      • 5.2.1 Materials
      • 5.2.2 Number of Positions
      • 5.2.3 Durability
      • 5.2.4 Contact Retention Force
      • 5.2.5 Connector Mating and Unmating Forces
      • 5.2.6 Contact Engagement and Separation Forces
      • 5.2.7 Contact Identification
      • 5.2.8 Connector Requirements
    • 5.3 Electrical Requirements
    • 5.4 Environmental Requirements
  • 6. Levels of Compliance
    • 6.1 Variable Elements of Capability
      • 6.1.1 Data Path
      • 6.1.2 DMA Support
      • 6.1.3 Interlocked Operation
    • 6.2 Baseboards and Expansion Modules
    • 6.3 Compliance Level Notation
      • 6.3.1 Data Path
      • 6.3.2 DMA Support
      • 6.3.3 Interlocked Operation
      • 6.3.4 Examples
      • 6.3.5 Compliance Marking
  • Annex A Printed Circuit Hole Size and Contact Size
  • Annex B I/O Connector Examples

links: [Standard Status] - [Purchase] - [PDF*] - [Bus Architecture Collection - Description]

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URL: http://standards.ieee.org/reading/ieee/std_public/description/busarch/959-1988_desc.html

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