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IEEE Std 1284.3-2000 IEEE Standard for Interface and Protocol Extensions to IEEE 1284-Compliant Peripherals and Host Adapters -Description

Abstract: System extensions consistent with the implementation and functionality of 1284-2000 are covered. Multiport expansion architectures, daisy chains, an application and device driver programming interface architecture, and data link layer services are explored.

Keywords: daisy chain, data link layer services, device driver programming interface architecture, IEEE 1284, multiport expansion architecture, port sharing

Content +

  • 1. Overview
    • 1.1 Scope
    • 1.2 Purpose
  • 2. References
  • 3. Definitions
    • 3.1 General terminology
    • 3.2 Acronyms
    • 3.3 Communication modes
  • 4. Features and compliance
    • 4.1 Overview
    • 4.2 Multiport (MP)
      • 4.2.1 Multiplexor
      • 4.2.2 Daisy chaining
    • 4.3 Service provider interface (SPI) features
    • 4.4 Data link layer features
    • 4.5 Physical interface
    • 4.6 Compliance
      • 4.6.1 DC device
      • 4.6.2 Mux device
      • 4.6.3 SPI
      • 4.6.4 Data link
  • 5. Port-sharing protocols
    • 5.1 Overview
    • 5.2 Command packet protocol (CPP)
      • 5.2.1 CPP format
      • 5.2.2 General CPP timing
    • 5.3 DC architecture
      • 5.3.1 Interconnection
      • 5.3.2 Implementation
      • 5.3.3 Operation
      • 5.3.4 General DC CPP
      • 5.3.5 DC communications
    • 5.4 Multiplexor architecture
      • 5.4.1 Interconnection
      • 5.4.2 Implementation
      • 5.4.3 Operation
    • 5.5 Global reset
  • 6. Service provider interface (SPI)
    • 6.1 Overview
      • 6.1.1 IEEE P1284.3 Device enumeration
      • 6.1.2 CPP services
    • 6.2 SPI Client interface definition
      • 6.2.1 SPI_Initialize
      • 6.2.2 SPI_GetDeviceNumber
      • 6.2.3 SPI_GetDeviceCoordinates
      • 6.2.4 SPI_GetDeviceID
      • 6.2.5 SPI_Open
      • 6.2.6 SPI_IO
      • 6.2.7 SPI_Close
      • 6.2.8 SPI_Lock
      • 6.2.9 SPI_Unlock
      • 6.2.10 SPI_QueryCapabilities
    • 6.3 SPI hardware interface definition
  • 7. Data link layer
    • 7.1 Overview
    • 7.2 Data link SPI
      • 7.2.1 DL_Register
      • 7.2.2 DL_Unregister
      • 7.2.3 DL_Data
    • 7.3 Wire protocol
      • 7.3.1 Overview
      • 7.3.2 IEEE 1284.3 data link discovery
      • 7.3.3 Framing
  • 8. Additional IEEE 1284 modes
    • 8.1 Bounded extended capabilities port (BECP) mode
    • 8.2 Channelized nibble mode
  • Annex A Enhanced parallel port (EPP) BIOS
    • A.1 Background
    • A.2 Overview
      • A.2.1 EPP BIOS application program interface
      • A.2.2 Earlier versions of EPP BIOS
    • A.3 Multiport operation
      • A.3.1 Daisy chaining
      • A.3.2 EPP I/O concurrence
    • A.4 EPP BIOS calls
      • A.4.1 Installation Check
      • A.4.2 Query Config
      • A.4.3 Set Mode
      • A.4.4 Get Mode
    • A.5 EPP BIOS error codes
  • Annex B SPI usage examples
    • B.1 Operating system initialization
    • B.2 To locate a specific device in the configuration
    • B.3 To perform an output operation using SPI_IO
    • B.4 Using proprietary I/O for output
    • B.5 To perform input from a remote IEEE 1284 device, asynchronously
  • Annex C Bibliography
  • Annex D Signal transition events

links: [Standard Status] - [Purchase] - [PDF*] - [Bus Architecture Collection - Description]

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