ANSI/IEEE Std1096-1988 IEEE Standard for Multiplexed High-Performance Bus Structure: VSB -Description

Content

• 1. Introduction
• • 1.1 VSB Specification Objectives
  • 1.2 VSB System Elements
  • • 1.2.1 Basic Definitions
  • 1.3 Specification Diagrams
  • 1.4 Specification Terminology
  • • 1.4.1 Signal Line States
    • 1.4.2 Use of the Asterisk (*)
  • 1.5 Protocol Specification
  • 1.6 References
• 2. VSB Data Transfer Bus
• • 2.1 Introduction
  • 2.2 Data Transfer Bus Lines
  • • 2.2.1 Addressing Lines
    • 2.2.2 Data Lines AD00-AD31
    • 2.2.3 Control Lines
  • 2.3 DTB Modules — Basic Description
  • • 2.3.1 MASTER
    • 2.3.2 SLAVE
  • 2.4 Capabilities of MASTERS and SLAVES
  • • 2.4.1 Addressing Capabilities
    • 2.4.2 Data Transfer Capabilities
    • 2.4.3 Interrupt Capability
  • 2.5 Interaction Between MASTERS and SLAVES
  • • 2.5.1 Interaction Between MASTERS and SLAVES During Address Broadcast
    • 2.5.2 Interaction Between MASTERS and SLAVES During the Data Transfer
    • 2.5.3 Interaction Between MASTERS and SLAVES During Cycle Termination
    • 2.5.4 Interaction Between the IHV MASTER and SLAVES During the INTERRUPT-ACKNOWLEDGE Cycle
  • 2.6 Data Transfer Bus Timing Specifications
• 3. VSB Data Transfer Bus Arbitration
• • 3.1 Introduction
  • • 3.1.1 Types of Arbitration
  • 3.2 Arbitration Bus Lines
  • • 3.2.1 BREQ*
    • 3.2.2 BUSY*
    • 3.2.3 BGIN*/BGOUT*
  • 3.3 Arbitration Modules—Basic Description
  • • 3.3.1 ARBITER
    • 3.3.2 REQUESTER
  • 3.4 Capabilities of the REQUESTER
  • • 3.4.1 Serial Arbitration
    • 3.4.2 Parallel Arbitration Capability
    • 3.4.3 Power-Up Sequence
  • 3.5 Interaction Between the MASTER, Its Associated REQUESTER and/or Its Associated ARBITER
  • • 3.5.1 Acquisition of the DTB
    • 3.5.2 Release of the DTB
    • 3.5.3 Race Conditions Between MASTER Requests and ARBITER Grants
  • 3.6 Arbitration Bus Timing Specifications
• 4. Electrical Characteristics of VSB Boards
• • 4.1 Introduction
  • • 4.1.1 Terminology
  • 4.2 Power Distribution
  • • 4.2.1 DC Voltage Specifications
    • 4.2.2 Connector Electrical Ratings
  • 4.3 Bus Driving and Receiving Requirements
  • • 4.3.1 General
    • 4.3.2 Driving and Loading RULES for Three State Lines
    • 4.3.3 Driving and Loading RULES for Open-Collector Lines
    • 4.3.4 Driving and Loading RULES for BGIN* and BGOUT*
    • 4.3.5 Receiving RULES for the Geographical Addressing Lines
    • 4.3.6 Additional Information
  • 4.4 Signal Line Interconnection — Summary
• 5. VSB Backplane Specifications
• • 5.1 Introduction
  • 5.2 Backplane Physical Characteristics
  • 5.3 Power Distribution
  • 5.4 Backplane Electrical Characteristics
  • • 5.4.1 Characteristic Impedance
    • 5.4.2 Termination Networks
  • 5.5 Signal Line Interconnection
  • • 5.5.1 General
    • 5.5.2 BGIN*/BGOUT* Daisy-Chain
    • 5.5.3 Geographical Addressing
    • 5.5.4 Additional Information
  • 5.6 VSB Pin Assignment

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