896.1-1987 - IEEE Standard Backplane Bus Specifications for Multiprocessor Architectures: Futurebus+(R)
Description: The standard specifies the functional, electrical, and mechanical requirements for a set of signal lines that constitute a backplane bus, and for the interfacing of boards connected to that bus. The bus provides the means for the transfer of binary digital information between boards over a single backplane. The number of physical modules is restricted to 24 due to electrical and mechanical constraints, even though slot addressing allows up to 31 modules. The modules may contain any combination of one or more processors and immediate peripherals such as memory, peripheral, and communication controllers.