Synthetic Waveform Generator Enter ModelName Here Enter ModelName Here Enter ModelName Here Enter ModelName Here Enter ModelName Here Enter ModelName Here Enter ModelName Here Operating Humidity in percent Operating Shock limit in G's Operating Temperature in degrees Celsius Storage and Transport humidity in percent Storage and Transport Shock limit in G's Storage and Transport temperature in degrees Celsius Power line frequency in Hertz AC Line Voltage Power Line Current in Amps AC Power input Power line frequency in Hertz AC Line Voltage Power Line Current in Amps AC Power input This instrument complies with all FCC Class B regulations This instrument has received European CE Certification D.1.1 Input requirements None D.1.2 Output channel requirements D.1.2.1 Programmable settings (Channel 1-N) D.1.2.1.1 Common programmable settings (Channel 1-N) D.1.2.1.1.1 Operating mode Continuous Burst D.1.2.1.1.2 Output enable 1) An output will be present at the specified output port if it is enabled and triggered. 2) The value of this setting is binary; it's either on or off. D.1.2.1.1.3 Output mode Standard Function Arbitrary Waveform Arbitrary Sequence 1) This setting has three possible values; Standard Function, Arbitrary Waveform and Arbitrary Sequence. 2) The FGEN settings apply when the output mode is set to standard function. 3) The ARB settings apply when the output mode is set to either Arbitrary Waveform or Arbitrary Sequence. 4) This setting enables and disables large portions of the API. D.1.2.1.1.4 Output impedance 1) This can be thought of as output impedance mode. 2) If the unit has more than one (a variable output impedance), then this setting will have a value that defines the output impedance. Examples are 600 ohm, 50 Ohm, 1K ohm etc D.1.2.1.1.5 Burst count D.1.2.1.1.6 AM enabled D.1.2.1.1.7 AM internal depth D.1.2.1.1.8 AM internal frequency D.1.2.1.1.9 AM internal waveform Sine Square Triangle Ramp D.1.2.1.1.10 AM source Internal External D.1.2.1.1.11 FM enabled D.1.2.1.1.12 FM internal deviation D.1.2.1.1.13 FM internal frequency D.1.2.1.1.14 FM internal waveform Sine Square Triangle Ramp D.1.2.1.1.15 FM source Internal External D.1.2.1.2 Unique ARB programmable settings (Channel 1-N) D.1.2.1.2.1 Arbitrary gain D.1.2.1.2.2 Arbitrary DC offset D.1.2.1.2.3 Arbitrary sample rate D.1.2.1.3 Unique FGEN programmable settings (Channel 1-N) D.1.2.1.3.1 Amplitude D.1.2.1.3.2 Offset D.1.2.1.3.3 Duty cycle high D.1.2.1.3.4 Frequency D.1.2.1.3.5 Start phase D.1.2.1.3.6 Waveform Sine Square Triangle Ramp-up Ramp-down D.1.2.2 Output parameters (Channel 1-N) D.1.2.2.1 Bandwidth (-3dB) D.1.2.2.2 Bandwidth (-3dB) without reconstruction filter D.1.2.2.3 Frequency response (plot) D.1.2.2.3 Plot 1) Plots are the recommended means of reporting the influence that different settings, or operating modes have on the frequency response, of the SI Waveform Generator. 2) Frequency response plots are normally reported as typical. D.1.2.2.4 Output impedance D.1.2.2.5 Pulsed transition time D.1.2.2.6 Absolute maximum output or short circuit protection D.1.2.2.7 Maximum reverse power D.1.2.2.8 DC offset resolution (settability) D.1.2.2.9 DC offset accuracy 1) DC accuracy shall be specified with the offset set to zero. 2) Specify the applicable temperature range, with and/or without self-calabration. D.1.2.2.10 DC offset accuracy temperature coefficient 1) This is a change in DC gain accuracy without re-calibration over the applicable temperature range. D.1.2.2.11 Output (AC) resolution (settability) D.1.2.2.12 Output (AC) accuracy 1) Specify the applicable temperature range, with and/or without self-calabration. 2) Recommend 10 kHz and 50 kHz be used for low frequency converters. D.1.2.2.13 Output (AC) accuracy temperature coefficient 1) This is a change in AC Accuracy without re-calibration over the applicable temperature range. D.1.2.2.14 Signal to noise ratio (SNR) SNR (dB) = 10 log (Power signal (rms) / Power of the Noise (rms)) D.1.2.2.15 Noise floor D.1.2.2.16 Harmonics D.1.2.2.17 Spurious free dynamic range (SFDR) D.1.2.2.18 System phase noise D.1.2.2.19 System jitter D.1.2.2.20 Frequency switching time D.1.2.2.21 AM input sensitivity D.1.2.3 Output related parameters (Data Input/Output) D.1.2.3.1 Signal type TTL D.1.2.3.2 Synchronization type TTL D.1.2.3.3 Number of Channels D.1.2.3.4 Number of Bits D.1.2.3.5 Output modes Digital only Analog only Digital and analog Off D.1.2.3.6 Output termination requirements D.1.2.3.7 Max sample rate D.1.2.3.8 Min sample rate D.1.3 Time base requirements D.1.3.1 Time base programmable settings D.1.3.1.1 Reference selection Internal External D.1.3.1.2 Time base selection Internal External D.1.3.2 General time base parameters D.1.3.2.1 Sample clock range 1) This applies to ARBs only. 2) Specify the minumum and maximum for each time base case D.1.3.2.2 Sample clock resolution 1) This applies to ARBs only. D.1.3.2.3 Sample clock frequency accuracy D.1.3.2.4 Reference long term drift 1) The drift shall be specified over a period of one year minimum. 2) The manufacturer shall describe the measurement method used to establish the drift specification. D.1.3.2.5 Sample clock phase noise 1) Provide guaranteed numbers at offsets per Department of Commerce guidelines. D.1.3.2.6 Sampling jitter 1) Make the low end test at 100 HZ and the high end test at the Nyquest frequency. 2) Specify the sample clock frequency being tested. D.1.3.3 Time base input port parameters Time base input port parameters for Fref_in D.1.3.3.1 Port type (Fref_in) See Ports Section D.1.3.3.2 Signal type (Fref-in) Sine 1) Describe the signal type in conventional terms meaningful to the user. 2) There may be multiple signal types supported. If so, define the applicable setting. D.1.3.3.4 Duty cycle tolerance 1) This shall be reported as worst case deviation from ideal clock symmetry. 2) Fref_in and Clk_in are assumed to have different duty cycle tolerances. Report them separately. D.1.3.3.5 Input frequency range D.1.3.3.6 Input frequency lock bandwidth (Fref_in) D.1.3.3.7 Input impedance 1) This parameter is typically set by design to 50 ohm. 2) This could also be a setting if there is more than one signal type supported D.1.3.3.8 Coupling (if applicable to signal type) AC D.1.3.3.9 Minimum slew rate (for non sinusoidal input types) 1) Assume that the requirements for Fref_in and Clk_in are unique. 2) In general the manufacturer should describe the ideal input signal characteristics. D.1.3.3.10 Input amplitude range D.1.3.3.11 Absolute maximum input Time base input port parameters for Clk_in D.1.3.3.1 Port type (Fref_in) See Ports Section D.1.3.3.2 Signal type (Fref-in) Sine 1) Describe the signal type in conventional terms meaningful to the user. 2) There may be multiple signal types supported. If so, define the applicable setting. D.1.3.3.4 Duty cycle tolerance 1) This shall be reported as worst case deviation from ideal clock symmetry. 2) Fref_in and Clk_in are assumed to have different duty cycle tolerances. Report them separately. D.1.3.3.5 Input frequency range D.1.3.3.6 Input frequency lock bandwidth (Clk_in) D.1.3.3.7 Input impedance 1) This parameter is typically set by design to 50 ohm. 2) This could also be a setting if there is more than one signal type supported D.1.3.3.8 Coupling (if applicable to signal type) AC D.1.3.3.9 Minimum slew rate (for non sinusoidal input types) 1) Assume that the requirements for Fref_in and Clk_in are unique. 2) In general the manufacturer should describe the ideal input signal characteristics. D.1.3.3.10 Input amplitude range D.1.3.3.11 Absolute maximum input D.1.3.4 Time base output port parameters Time base output port parameters for Fref_out D.1.3.4.1 Port type (Fref_out) See Ports Section D.1.3.4.2 Signal type Sine D.1.3.4.3 Output amplitude D.1.3.4.4 Output impedance D.1.3.4.5 Output frequency range D.1.3.4.6 Output circuit protection D.1.3.4 Time base output port parameters D.1.3.4.1 Port type (Clk_out) See Ports Section D.1.3.4.2 Signal type Sine D.1.3.4.3 Output amplitude D.1.3.4.4 Output impedance D.1.3.4.5 Output frequency range D.1.3.4.6 Output circuit protection D.1.4 Power requirements See PowerRequirements Section D.1.5 Physical characteristics See PhysicalCharacteristics Section D.1.6 Communications and control requirements D.1.6.1 Controllability/software driver See Control Section D.1.6.2 Internal/external control Specify whether can be controlled via an external or internal controller, or both D.1.6.3 Trigger port(s) requirements D.1.6.3.1 Trigger programmable settings D.1.6.3.1.1 Trigger type Edge Gated Software 1) Only two types of trigger are supported; edge and software. D.1.6.3.1.2 Coupling AC DC GND D.1.6.3.1.3 Polarity/slope plus minus D.1.6.3.1.4 Input impedance D.1.6.3.1.5 Threshold adjustment (if applicable) D.1.6.3.1.6 Trigger delay D.1.6.3.1.7 Hysteresis characteristics D.1.6.3.1.8 Internal trigger clock rate D.1.6.3.1.9 Source Ch 1 Ch N Software External D.1.6.3.2 Trigger input parameters (Tsync_in and Ch 1-N) D.1.6.3.2.1 Connector type See Connectors section D.1.6.3.2.2 Trigger signal type TTL D.1.6.3.2.3 Trigger level range D.1.6.3.2.4 Trigger sensitivity D.1.6.3.2.5 Trigger polarity Positive Negative Both D.1.6.3.2.6 Threshold adjustment range D.1.6.3.2.7 Trigger level resolution D.1.6.3.2.8 Minimum trigger width D.1.6.3.2.10 Absolute maximum input D.1.6.3.2.11 Re-arm time 1) This is only applicable to multi-trigger acquisitions. Assume no pre-trigger data. D.1.6.3.2.12 Input impedance D.1.6.3.2.13 Trigger delay range D.1.6.3.2.14 Trigger delay resolution 1) Provide the resolution or settability for the trigger delay. D.1.6.3.2.15 Trigger jitter 1) Jitter and interpolator standard deviation can be measured. D.1.6.3.2.16 Trigger uncertainty/pipeline delay D.1.6.3.3 Trigger output parameters (Tsync_out) D.1.6.3.3.1 Port type marker out 1-N See Connectors section D.1.6.3.3.2 Number of marker outputs D.1.6.3.3.3 Signal type D.1.6.3.3.4 Output trigger polarity Positive Negative D.1.6.3.3.5 Amplitude range D.1.6.3.3.7 Marker output latency D.1.6.3.3.8 Marker output latency uncertainty D.1.6.3.3.9 Marker output width range D.1.6.3.3.10 Marker output width resolution D.1.6.3.3.11 Marker output delay setting range D.1.6.3.3.12 Marker output delay setting resolution D.1.6.3.3.13 Marker output impedance D.1.7 Memory parameters D.1.7.1 Waveform memory parameters D.1.7.1.1 Memory type 1) Describe whether the memory is volatile or non-volatile, and any limitations to its use. D.1.7.1.2 Total waveform memory size D.1.7.1.3 Minimum waveform segment length D.1.7.1.4 Maximum waveform segment length D.1.7.1.5 Number of waveform memory segments D.1.7.1.6 Waveform segment play modes D.1.7.1.7 Sequences D.1.7.1.8 Maximum number of sequences D.1.7.1.9 Maximum sequence loop count size D.1.7.1.10 Maximum number of loops within a memory segment D.1.7.1.11 Sequence play modes D.1.7.1.12 Sequence and waveform advance modes D.1.7.1.13 Sequence vectoring None D.1.7.1.14 Waveform markers None D.1.7.2 Module readable parameters D.1.7.2.1 Output count D.1.7.2.2 Maximum number of waveform segments applies to the ARB only. D.1.7.2.3 Maximum waveform size applies to the ARB only. D.1.7.2.4 Minimum waveform size applies to the ARB only. 1) This applies to the ARB only. D.1.7.2.5 Waveform quanta applies to the ARB only. 1) This applies to the ARB only. D.1.7.2.6 Maximum number of sequences applies to the ARB only. D.1.7.2.7 Maximum loop count applies to the ARB only. D.1.7.2.8 Maximum sequence length applies to the ARB only. D.1.7.2.9 Minimum sequence length applies to the ARB only. D.1.7.3 Security None D.1.8 High Speed Data Port None