There is currently no defined, independent standard for this new test technology. Each vendor is free in the way of implementing test hardware functionality in their ICs. Without an independent standard, testability is reduced and test coverage may not be complete making the test technology less useful for users. This protocol will provide the necessary implementation rules for highest coverage and diagnosis and for test mode access and exit. It will guide IC vendors to implement and test manufacturers to support this uniform design-for-test method. The standard also allows implementation in devices other than memories. In contrast to IEEE 1149.1 standard this standard provides a static test method, requires less test pins and is lower in costs.
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