IEEE
and Accellera Announce the Approval of Verilog-2001 as a Revised
IEEE Standard
Popular
Hardware Description Language Adds Behavioral Modeling Support,
Improves ASIC Timing, Simulation Control and Interoperability
Contact:
Georgia Marszalek, Accellera Public Relations Counsel, + 1 650
345 7477, Georgia@ValleyPR.com
Karen McCabe,
IEEE Marketing Manager, +1 732 562 3824, k.mccabe@ieee.org
For Release:
Immediate
(PISCATAWAY,
NJ, 22 October 2001) Accellera, the EDA organization focused
on language-based electronic design and the IEEE today announced
that IEEE Std 1364-2001™, the Verilog hardware description
language (HDL) standard, also known as Verilog-2001, was approved
by the IEEE as a revised standard in March of this year. This
new standard description is now available from the IEEE, and supersedes
the original 1995 standard.
To improve
design accuracy and address the needs of submicron designers,
IEEE 1364 or Verilog-2001 adds capabilities for system-level modeling
and greater ASIC timing accuracy. Enhancements in the Verilog
Programming Language Interface (PLI) provide greater simulation
control and improved interoperability.
“IEEE
1364-2001 has the needed features required for next generation
design starts and the official approval of the IEEE,” said
Dennis Brophy, Accellera chairman. “Accellera is proud to
support the development and enhancement of IEEE hardware description
language standards.”
“It gives
me great pleasure to see Verilog reaffirmed as an IEEE standard.
Verilog is the most popular sign-off language for electronic designs,
and thanks to worldwide support from leading companies, it continues
to gain users,” commented Maq Mannan, IEEE 1364 chairman.
What’s
New
IEEE 1364-2001 improvements include:
1. Behavioral extensions so designers can model at a higher level
and create code faster
2. ASIC timing modeling improvements enable more accurate sign-off
for deep submicron design
3. Simulation control capabilities for performance improvement
and for handling the system architecture of larger and more complex
designs
4. New and enhanced PLI routines for improved design tool interoperability
Price and
Availability
The pdf version of IEEE Standard 1364-2001 is available now. To
order, visit the IEEE Catalog & Store:
http://shop.ieee.org/ieeestore/product.aspx?product_no=SS94921
The print version will be available later this month:
http://shop.ieee.org/ieeestore/product.aspx?product_no=SH94921
About Accellera
Accellera is an electronics industry organization that drives
the worldwide development and use of standards required by systems,
semiconductor and design tool companies that enhance a language-based
design automation process This includes support of technical groups
involved with developing standards for IEEE 1364 or Verilog HDL
and IEEE 1076 or VHDL. For more information visit www.accellera.org.
About the
IEEE Standards Association
The IEEE Standards Association (IEEE-SA) is an international membership
organization serving today's industries with a complete portfolio
of standards programs. The IEEE-SA is a major contributor to the
IEEE, which is the world's largest technical professional society.
IEEE-SA membership, through its IEEE association, promotes the
engineering process by creating, developing, integrating, sharing
and applying knowledge about electro- and information technologies
and sciences for the benefit of humanity and the profession. More
information is found at http://standards.ieee.org/sa-mem/index.html
IEEE Std 1364-2001
is a trademark of the IEEE. All other names or product names are
the trademarks, service marks or registered trademarks of their
respective holders.
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