IEEE P1149.7 Working Group Calls
for Participation
IEEE-SA Standards Board Approves Work on Draft
Standard for Reduced-pin and Enhanced-functionality
Test Access Port and Boundary Scan Architecture
The P1149.7 Working Group is forming now under the
IEEE-SA
Entity model and announces a call for participants.
Currently, testing and debugging challenges now exist
due to increased integration levels, the consolidation
of systems into fewer chips, and the increased focus
on low-power operation and single-chip system solutions.
This project will define a debug and test interface
which meets an expanding set of challenges facing
debug and test systems (many which have emerged since
the inception of IEEE 1149.1-1990) while preserving
the hardware and software investments of the many
industries currently using IEEE 1149.1.
The initial P1149.7 Working Group teleconference
occured on 25 April 2006. The next teleconference
is scheduled for 8 May 2006.
If your entity is interested in joining this activity,
please contact Noelle Humenick, n.humenick@ieee.org,
Project Manager for IEEE P1149.7. Founding members
will receive a discount off of the Working Group Membership
fee.
