PISCATAWAY, N.J., USA, 31 January 2005 The
IEEE 1850(TM) Working Group
announced today that the Accellera Property Specification
Language (PSL) version 1.1 has been recognized by
a DesignVision award from the International Engineering
Consortium (IEC). The award has been presented to
Accellera in recognition of the significant contribution
that PSL v1.1 has made to the EDA industry.
PSL is a language for specifying the functional behavior
of a design. It enables designers and verification
engineers to clearly document interface constraints,
communication protocols, and general design functionality
in an executable form that can be verified in simulation
and can also be used in static verification flows.
The Accellera PSL standard is based upon IBM's "Sugar"
language, which was developed and validated at IBM
Haifa Research Labs for many years before IBM donated
the language to Accellera for standardization.
"We are very happy to see PSL being honored
by this award," said Harry Foster, Chief Methodologist
at Jasper Design Automation and chairman of the IEEE
1850 PSL Working Group, which is turning the Accellera
PSL v1.1 standard into an IEEE standard. "PSL
offers an exciting opportunity to establish a standard
based on a new approach to capturing design and verification
requirements."
Through an efficient community effort, building on
the hard work of many volunteers over several years,
PSL has evolved to become the most widely-used property
language across the electronics industry. Underlying
the popularity of PSL are its true interoperability
across multiple languages and design flows, its power
of expressiveness, and its ease-of-use.
"We are extremely pleased to have PSL recognized
by a DesignVision Award," said Yaron Wolfsthal,
co-chairman of the 1850 group and Senior Manager of
Formal Verification and Testing Technologies at the
IBM Haifa Labs. "PSL is being adopted quickly
throughout the electronics industry. With more than
half of EDA tool users using or planning to use assertions,
establishing a standard has become vital."
"This is only the beginning for PSL," notes
Erich Marschner, secretary of the 1850 group and Senior
Architect for Advanced Verification at Cadence. "With
the forthcoming completion of the IEEE standardization
of PSL, the language will gain additional ground as
the standard specification language of choice for
engineers worldwide."
PSL has attracted much attention within the design
community and across academia over the last years.
The PSL/Sugar Consortium (http://www.pslsugar.org/)
was established to help hardware designers adopt and
implement PSL-related methodologies to speed design
verification. Additionally, PSL is now the focus of
the European Commission's $8.7M Prosyd Project on
Property-Based System Design (see http://www.prosyd.org),
the goal of which is to significantly increase the
competitiveness and efficiency of the European IT
industry through the establishment of a standard,
integrated property-based paradigm for the design
of electronic systems.
The nomination of PSL for the DesignVision award
was made by the officers of the IEEE 1850 PSL Working
Group on behalf of the many companies and individuals
who contributed their time, expertise, and support
to the development of PSL. These include Accellera,
who sponsored the original development of the language;
IBM, who provided the basis for PSL through donation
of the Sugar language; participants in the Accellera
Formal Verification Technical Committee (FVTC), who
developed the Accellera versions (v1.0, v1.01, v1.1)
of PSL; the companies who sponsored the development
of PSL by allowing their employees to donate their
expertise, time, and effort to the FVTC; and the companies
who have incorporated PSL into their products.
About the DesignVision Award
The DesignVision Award recognizes companies for products
and services that have added a new dimension to the
electronic design industry. The Award winners will
be announced at the DesignCon conference on 1 February,
2005. For more information, please visit http://www.designcon.com/exhibition/designvision_awards.html.
About the IEEE 1850 PSL Working Group
The IEEE 1850 PSL Working Group is creating an IEEE
version of the Accellera PSL v1.1 standard. The purpose
of the working group is to provide a well-defined
language for formal specification of electronic system
behavior, one that is compatible with multiple electronic
system design languages, including IEEE 1076(TM) VHDL,
IEEE 1364(TM) Verilog, IEEE 1800 System Verilog, and
OSCI SystemC, to facilitate a common specification
and verification flow for multi-language and mixed-language
designs. For more information, please visit http://www.eda.org/ieee-1850/.
About the IEEE Standards Association
The IEEE Standards Association, a globally recognized
standards-setting body, develops consensus standards
through an open process that brings diverse parts
of an industry together. These standards set specifications
and procedures based on current scientific consensus.
The IEEE-SA has a portfolio of more than 870 completed
standards and more than 400 standards in development.
For information on IEEE-SA see: http://standards.ieee.org/.
About the IEEE
The IEEE has more than 360,000 members in approximately
175 countries. Through its members, the organization
is a leading authority on areas ranging from aerospace,
computers and telecommunications to biomedicine, electric
power and consumer electronics. The IEEE produces
nearly 30 percent of the world's literature in the
electrical and electronics engineering, computing
and control technology fields. This nonprofit organization
also sponsors or cosponsors more than 300 technical
conferences each year. Additional information about
the IEEE can be found at http://www.ieee.org.
IEEE 1850™ is a trademark of the IEEE. All
other names or product names are the trademarks, service
marks or registered trademarks of their respective
holders.
